Terasic Technologies DE10-Agilex™ Development & Education Kit

Terasic Technologies DE10-Agilex™ Development and Education Kit is based on the powerful Intel® Agilex™ FPGA, enabling speed and power breakthroughs with 40% higher performance and 40% lower power for equivalent performance. The accelerator features PCI Express® Gen 4.0 x16 and two 200G QSFP-DD connectors. It offers 32GB of DDR4 with a bandwidth of up to 680Gbps to provide adaptable acceleration, maximum throughput, and highly customizable data processing for compute-intensive applications.

The Terasic Technologies DE10-Agilex™ Development and Education Kit fully supports the Intel Open VINO™ toolkit, OpenCL™ BSP, and Intel oneAPI toolkits to provide optimal computer vision and deep learning solutions. Customers' systems can achieve the highest computing performance and lowest cost for the user's data center and AI applications by leveraging the Agilex FPGA on the DE10-Agilex accelerator.

Features

  • Intel Agilex F-Series AGFB014R24A2E2VR0
    • 1437K logic elements (LEs)
    • 139Mbits embedded memory (M20K)
    • 9020 18-bit x 19-bit multipliers
    • 4510 variable-precision DSP blocks
    • 1x PCIe Gen4 x16 hard IP blocks
    • Transceivers
      • 16x 28Gbps NRZ transceivers (E-tile), eight of them can run 58Gbps PAM4
      • 16x 17.4Gbps NRZ transceivers (P-tile)
  • JTAG header and FPGA configuration
    • Onboard USB Blaster II or JTAG header for use with the Quartus
    • Prime programmer
    • MAX10 FPGA 10M04SCU169 system controller and Avalon-ST x16 for configuration
    • AS x4 configuration via EPCQ-L configuration device (DNI)
  • Memory devices
    • 4x DDR4 SO-DIMM sockets, each supporting up to 16GB ECC DDR4 SDRAM
    • 128MB Flash (connected to the system MAX10 FPGA)
  • General user I/O
    • 4x user-controllable LEDs
    • 2x user push buttons
    • 2x user dip switches
  • Clock interface
    • 50MHz and 100Mhz oscillators
    • Programming PLL providing clock for QSFP-DD interface
    • Dual clock oscillators for DDR4 SDRAM SO-DIMM
    • U.FL connector for external differential clock input
    • 1x 2x5 GPIO timing expansion header
  • Communication ports
    • 2x QSFP-DD cages
      • Each can run up to 200Gbps
      • Compatible with QSFP and QSFP28
    • PCI Express x16 edge connector
      • Support for PCIe x16 Gen4
      • Edge connector for PC motherboard with x16 PCI Express slot
    • 4-pin UART-to-USB (integrated with USB-Blaster with USB Hub)
  • System monitor and control
    • Dashboard system for system management (implemented by the MAX10 FPGA system)
    • Temperature sensor
    • Fan control
    • Power monitor
  • Power Source
    • PCI Express 8-pin 12VDC power
    • PCI Express edge connector power
  • Mechanical specification of PCI Express full-height and 3/4-length

Applications

  • High-Performance Computing (HPC)
  • Networking and communications
  • Embedded systems and edge computing
  • Video and image processing
  • Prototyping and custom hardware acceleration
  • Security and cryptography

Block Diagram

Block Diagram - Terasic Technologies DE10-Agilex™ Development & Education Kit

Board Overview

Mechanical Drawing - Terasic Technologies DE10-Agilex™ Development & Education Kit
게시일: 2026-01-07 | 갱신일: 2026-01-13