Infineon Technologies PSoC®4100M ARM 마이크로컨트롤러
Cypress Semiconductors PSoC®4100M ARM 마이크로컨트롤러는ARM® Cortex™-M0 CPU를 탑재한 프로그램가능한 임베디드 시스템 컨트롤러 제품군입니다. 이 마이크로컨트롤러는 유연한 자동 라우팅과 프로그래밍 가능 및 재구성 가능 아날로그와 디지털 블록을 결합했습니다. PSoC4100M ARM 마이크로컨트롤러는 싱글 사이클 멀티플라이, 최대 128KB의 플래시 및 읽기 가속기를 탑재한 24MHz ARM Cortex-M0 CPU입니다. 이 마이크로컨트롤러는 새로운 애플리케이션 및 설계 요구 조건을 위한 PSoC4 플랫폼 멤버들와 호환합니다. PSoC4100M은 프로그램 가능 아날로그 및 디지털 서브시스템을 통해 유연성과 현장에서 직접 수행하는 설계 튜닝 작업을 수행할 수 있습니다.특징
- 32-bit MCU subsystem
- 24MHz Arm Cortex-M0 CPU with single-cycle multiply
- Up to 128kB of flash with Read Accelerator
- Up to 16kB of SRAM
- DMA engine
- Programmable analog
- Four opamps that operate in Deep Sleep mode at very low current levels
- All opamps have reconfigurable high current pin-drive, high-bandwidth internal drive, ADC input buffering, and comparator modes with flexible connectivity allowing input connections to any pin
- Four current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin
- Two low-power comparators that operate in Deep Sleep mode
- 12-bit SAR ADC with 806Ksps conversion rate
- Low power 1.71V to 5.5V operation
- 20nA stop mode with GPIO pin wakeup
- Hibernate and Deep Sleep modes allow wakeup-time versus power trade-offs
- Capacitive sensing
- Cypress Capacitive Sigma-Delta (CSD) technique provides best-in-class SNR (>5:1) and water tolerance
- Cypress-supplied software component makes capacitive sensing design easy
- Automatic hardware tuning (SmartSense™)
- Segment LCD drive
- LCD drive supported on all pins (common or segment)
- Operates in Deep Sleep mode with 4 bits per pin memory
- Serial communication
- Four independent run-time reconfigurable serial communication blocks (SCBs) with reconfigurable I2C, SPI, or UART functionality
- Timing and pulse-width modulation
- Eight 16-bit timer/counter pulse-width modulator (TCPWM) blocks
- Center-aligned, Edge, and Pseudo-random modes
- Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications
- Package options
- 68-pin QFN, 64-pin TQFP wide and narrow pitch, and 48-pin TQFP packages
- Up to 55 programmable GPIOs
- GPIO pins can be CapSense, LCD, analog, or digital
- Drive modes, strengths, and slew rates are programmable
- PSOC Creator Design Environment
- Integrated Development Environment (IDE) provides schematic design entry and build (with analog and digital automatic routing)
- Applications Programming Interface (API component) for all fixed-function and programmable peripherals
- Industry-standard tool compatibility
- After schematic entry, development can be done with Arm-based industry-standard development tools
Block Diagram
게시일: 2016-04-21
| 갱신일: 2025-08-19
